CMOS outphasing class-D amplifiers with Chireix Combiners
論文發表人:洪才弼 (加州大學聖地牙哥校區電機所博士班)
這篇論文提出相位互補式D類放大器及Chireix功率結合器.. 應用0.18um互補式金氧半導體技術設計與實現使用於此系統中的兩個電壓式D類放大器.再利用Chireix功率結合器的技術,可提升放大器在CDMA信號操作條件下的能量轉換效率 (drain efficiency)從38.6%提升到48%當輸出功率從14.5dBm增加到15.4dBm且達到相鄰頻道功率比(ACPR) -45dBc.
This paper presents a CMOS outphasing Class-D power amplifier with a Chireix combiner. Two voltage-mode Class-D amplifiers used in the outphasing system were designed and implemented with a 0.18um CMOS process. By applying the Chireix combiner technique, drain efficiency of the outphasing PA for CDMA signals was improved from 38.6% to 48% while output power was increased from 14.5 dBm to 15.4 dBm with an ACPR of -45 dBc.
標籤: 加大聖地牙哥分校