發表人: 胡文祥(加州大學爾灣分校電機與資訊工程系博士班)
http://www.isocc.org/
低密度同位元檢查碼是種具有接近薛農極限的錯誤更正碼,它具有適合於平行實現的性質,並且已經被多種通訊規格所採用,例如DVB-S2, WiMAX, Wi-Fi等.在面對一個多種不同應用整合的時代,我們需要實現不同種類低密度同位元檢查碼在單一系統的實現方案,為了這個目的,我們提出使用多處理器平台作為解決方式.然而, 頻繁的處理器間的資訊交換限制了執行速度,在這篇論文中,我們使用基於圖譜的分割方法,將運算單元有效的分配到處理器上,以減少處理器間資訊交換的數量.實驗結果顯示,我們提出的方法能有效減少33%~52%的資訊交換,並可增加85%的執行速度.
Low Density Parity Check (LDPC) code is an error correction code that has near Shannon limit performance and is inherently suitable for parallel implementation. It has been widely used in several communication standards such as DVB-S2, WiMAX, and Wi-Fi. To address the need for supporting various LDPC codes in an era where diverse applications are integrated onto a single system, a multi-processor based implementation of the LDPC decoder was proposed. However, the heavy message exchange among processors limits the expected performance. In this paper, we present a partitioning algorithm based on graph spectral clustering to reduce the data communication during the decoding process. From the experiments, our approach successfully decreased the amount of inter-processor communication by 33% ~ 52%, as compared to the original sequential mapping approach. Together with the more balanced computation load from our algorithm, an improvement of up to 85% in the overall decoding time was observed.
